1. Field of the Invention
The invention relates to a memory cell and an operation method thereof, and more particularly relates to a resistance memory cell and an operation method thereof.
2. Description of Related Art
A resistance memory has the advantages of low operation voltage, fast operation speed, simplified structure, and good durability, etc. and thus has become the most potential memory type in recent years. Generally speaking, the operation modes for switching the storage status of the resistance memory include unipolar switching and bipolar switching. Specifically, in the operation mode of unipolar switching, voltage pulses with the same polarity (e.g. positive voltage pulse or negative voltage pulse) are used to perform a programming operation and an erasing operation of the memory cell. In the operation mode of bipolar switching, voltage pulses with different polarities are used to respectively perform the programming operation and the erasing operation of the memory cell.
Besides, in the operation mode of unipolar switching, it needs to increase the amplitude and the pulse time of the voltage pulse to erase the memory cell in the conventional resistance memory. However, such a method tends to cause greater current stress during the erasing operation of the memory cell and results in device degradation and reduces reliability of the memory. Moreover, in the operation mode of bipolar switching, each memory cell of the resistance memory needs to be connected in series to a switch composed of a transistor for controlling the timing of switching the storage status of each memory cell. However, the layout of transistors requires a larger area, and as a result, the resistance memory may not be used to achieve a high-density memory array.